Project Release Information
This release comes with an interactive GNU/Octave interface. Syntax highlighting for Octave, Verilog-HDL, and Verilog-A syntax has been added. Pre-compiled VHDL modules and libraries made from user-written VHDL code are supported now. There are several new components, such as transistor models NIGBT, HICUM L2 v2.24, HICUM L0 v1.2g and HICUM L0 v1.3, tunnel diode, ideal coupled transmission line, and an ideal hybrid. The equation solver now has EMI receiver functionality implemented. The qucsconv command line data converter supports Matlab v4 as an export file format.
This release comes with new translations into Arabic and Czech, model libraries for MOSFETs regulators, varistors, and ideal components, and many new primitive components such as EPFL-EKV NMOS/PMOS V2.6, HICUM L0 v1.2, and numerous digital primitives. Passing parameters to Verilog-HDL and VHDL subcircuits and typed generic parameters of VHDL files are now supported as well as arbitrary in/out signals. The Qucs-Converter tool now allows you to translate existing HICUM models into library elements as well as the translation of polynomial C's and L's and F, H, E, and G polynomial SPICE sources.
This release comes with a few new components, i.e., diac, triac, thyristor, logarithmic amplifier, HICUM L0 v1.12, potentiometer, equation defined RF device, and MESFET (Curtice, Statz, TOM-1, and TOM-2). The Qucs-Transcalc tool also contains synthesis and analysis of coplanar line types. Printing under Win32 has finally been fixed. Support for sub- and super-script in graphical text paintings has been added. Last but not least, versions of PlotVs() with 3 or more arguments have been added to the equation solver capabilities.
This release comes with some new components, i.e. file-based current and voltage sources, a modular operational amplifier, and the HICUM L2 v2.22 device model. In equations, immediate vectors and matrices are allowed as well as engineering notation of numbers, and some more functions have been added (random, srandom, StabFactor, and StabMeasure). Touchstone files can be exported and CSV files can be imported using the command line data converter QucsConv.
This release comes with a translation into Ukrainian, a selectable preprocessor in the SPICE component, and two new components (exponential voltage and current source). Libraries can now contain analogue as well as digital subcircuits. Analogue modelling is substantially strengthened by symbolically defined devices. The list of available functions in the equation solver has been extended to support more functions, logical and rational operators, and the ternary ?: construct. Pure digital simulations can be also performed by Verilog-HDL as an alternative to VHDL.