By simulator + Tcl + C language, let's verify ASIC and FPGA effectively!
(simulator <= DPI-C => C++, simulator <= named pipes => C++ are under development, too.)
NOODLYBOX is a mimic processor for verification.
It can manipulate FPGA model which is connected to microcomputer's local bus.
Detail:
A microcomputer and FPGA are mounted on a printed circuit board.
A microcomputer and the connection form between FPGA are SRAM interface.
FPGA is modeled by VHDL or Verilog.
ModelSim, ISE Simulator, or Icarus Verilog are installed.
When all the conditions mentioned above are met, NOODLBOX can act as the substitute of the microcomputer on an HDL simulator.
You can download file releases of NOODLYBOX project from List of release files
System Requirements
Operating System: Windows NT/2000, Windows XP When the following software is not installed, this does not work.
* ModelSIM XE III Starter 6.3c or later / Icarus Verilog 20090923
* Xilinx ISE 9.2i or later
* felid labo pack a004 or MSYS 1.0.11 + MinGW 5.1.4
* Ruby(i386-mingw32)
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TimingChartViewer_r245.tar.bz2
noodlybox0012.zip