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/*
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* Copyright (c) 2007, 2008 University of Tsukuba
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of the University of Tsukuba nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 2010-2012 Yuichi Watanabe
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*/
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#ifndef _CORE_ASM_H
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#define _CORE_ASM_H
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#include <core/linkage.h>
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#include "desc.h"
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#include <core/types.h>
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struct vt_vmentry_regs {
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ulong rax, rcx, rdx, rbx, cr2, rbp, rsi, rdi;
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ulong r8, r9, r10, r11, r12, r13, r14, r15;
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ulong cr3;
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int pe, pg;
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struct {
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int enable, num;
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u16 es, cs, ss, ds, fs, gs;
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} sw;
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};
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struct svm_vmrun_regs {
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ulong cr0, rcx, rdx, rbx, cr4, rbp, rsi, rdi;
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ulong r8, r9, r10, r11, r12, r13, r14, r15;
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ulong cr3;
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};
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#define SW_SREG_ES_BIT (1 << 0)
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#define SW_SREG_CS_BIT (1 << 1)
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#define SW_SREG_SS_BIT (1 << 2)
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#define SW_SREG_DS_BIT (1 << 3)
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#define SW_SREG_FS_BIT (1 << 4)
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#define SW_SREG_GS_BIT (1 << 5)
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#define ASM_VMCALL "vmcall"
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asmlinkage int asm_vmlaunch_regs_32 (struct vt_vmentry_regs *p);
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asmlinkage int asm_vmresume_regs_32 (struct vt_vmentry_regs *p);
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asmlinkage int asm_vmlaunch_regs_64 (struct vt_vmentry_regs *p);
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asmlinkage int asm_vmresume_regs_64 (struct vt_vmentry_regs *p);
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asmlinkage void asm_vmrun_regs_32 (struct svm_vmrun_regs *p, ulong vmcb_phys,
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ulong vmcbhost_phys);
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asmlinkage void asm_vmrun_regs_64 (struct svm_vmrun_regs *p, ulong vmcb_phys,
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ulong vmcbhost_phys);
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static inline void
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asm_cpuid (u32 num, u32 numc, u32 *a, u32 *b, u32 *c, u32 *d)
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{
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asm volatile ("cpuid"
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: "=a" (*a), "=b" (*b), "=c" (*c), "=d" (*d)
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: "a" (num), "c" (numc));
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}
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static inline void
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asm_rdmsr32 (ulong num, u32 *a, u32 *d)
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{
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asm volatile ("rdmsr"
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: "=a" (*a), "=d" (*d)
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: "c" (num));
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}
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static inline void
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asm_wrmsr32 (ulong num, u32 a, u32 d)
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{
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asm volatile ("wrmsr"
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:
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: "c" (num), "a" (a), "d" (d));
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}
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static inline void
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asm_rdmsr64 (ulong num, u64 *value)
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{
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u32 a, d;
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asm_rdmsr32 (num, &a, &d);
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*value = (u64)a | ((u64)d << 32);
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}
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static inline void
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asm_wrmsr64 (ulong num, u64 value)
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{
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u32 a, d;
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a = (u32)value;
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d = (u32)(value >> 32);
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asm_wrmsr32 (num, a, d);
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}
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static inline void
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asm_rdmsr (ulong num, ulong *value)
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{
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#ifdef __x86_64__
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u64 value64;
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asm_rdmsr64 (num, &value64);
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*value = value64;
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#else
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u32 value32;
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u32 dummy;
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asm_rdmsr32 (num, &value32, &dummy);
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*value = value32;
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#endif
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}
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static inline void
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asm_wrmsr (ulong num, ulong value)
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{
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#ifdef __x86_64__
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asm_wrmsr64 (num, (u64)value);
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#else
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asm_wrmsr32 (num, (u32)value, 0);
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#endif
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}
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static inline void
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asm_rdcr0 (ulong *cr0)
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{
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asm volatile ("mov %%cr0,%0"
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: "=r" (*cr0));
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}
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static inline void
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asm_wrcr0 (ulong cr0)
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{
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asm volatile ("mov %0,%%cr0"
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:
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: "r" (cr0));
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}
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static inline void
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asm_rdcr2 (ulong *cr2)
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{
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asm volatile ("mov %%cr2,%0"
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: "=r" (*cr2));
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}
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static inline void
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asm_wrcr2 (ulong cr2)
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{
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asm volatile ("mov %0,%%cr2"
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:
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: "r" (cr2));
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}
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static inline void
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asm_rdcr3 (ulong *cr3)
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{
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asm volatile ("mov %%cr3,%0"
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: "=r" (*cr3));
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}
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static inline void
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asm_wrcr3 (ulong cr3)
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{
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asm volatile ("mov %0,%%cr3"
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:
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: "r" (cr3));
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}
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static inline void
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asm_rdcr4 (ulong *cr4)
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{
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asm volatile ("mov %%cr4,%0"
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: "=r" (*cr4));
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}
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static inline void
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asm_wrcr4 (ulong cr4)
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{
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asm volatile ("mov %0,%%cr4"
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:
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: "r" (cr4));
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}
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#ifdef __x86_64__
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static inline void
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asm_rdcr8 (u64 *cr8)
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{
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asm volatile ("mov %%cr8,%0"
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: "=r" (*cr8));
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}
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static inline void
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asm_wrcr8 (ulong cr8)
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{
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asm volatile ("mov %0,%%cr8"
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:
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: "r" (cr8));
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}
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#endif
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/* f3 0f c7 33 vmxon (%ebx) */
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static inline void
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asm_vmxon (void *vmxon_region)
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{
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asm volatile ("vmxon %0"
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:
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: "m" (*(ulong *)vmxon_region)
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: "cc", "memory");
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}
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/* 0f 01 c4 vmxoff */
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static inline void
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asm_vmxoff (void)
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{
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asm volatile ("vmxoff"
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:
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:
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: "cc");
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}
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/* 66 0f c7 33 vmclear (%ebx) */
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static inline void
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asm_vmclear (void *p)
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{
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#ifdef AS_DOESNT_SUPPORT_VMX
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asm volatile (".byte 0x66, 0x0f, 0xc7, 0x33"
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:
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: "b" (p)
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: "cc", "memory");
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#else
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asm volatile ("vmclear %0"
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:
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: "m" (*(ulong *)p)
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: "cc", "memory");
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#endif
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}
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/* 0f c7 33 vmptrld (%ebx) */
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static inline void
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asm_vmptrld (void *p)
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{
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asm volatile ("vmptrld %0"
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:
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: "m" (*(ulong *)p)
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: "cc", "memory");
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}
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/* 0f c7 3b vmptrst (%ebx) */
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static inline void
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asm_vmptrst (void *p)
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{
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asm volatile ("vmptrst %0"
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:
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: "m" (*(ulong *)p)
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: "cc", "memory");
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}
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/* 0f 79 c2 vmwrite %edx,%eax */
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static inline void
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asm_vmwrite (ulong index, ulong val)
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{
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#ifdef AS_DOESNT_SUPPORT_VMX
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asm volatile (".byte 0x0f, 0x79, 0xc2"
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:
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: "a" (index), "d" (val)
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: "cc");
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#else
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asm volatile ("vmwrite %1,%0"
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:
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: "r" (index), "rm" (val)
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: "cc");
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#endif
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}
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static inline void
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asm_vmwrite32(ulong index, u32 val)
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{
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ulong ulong_val = val;
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asm volatile ("vmwrite %1,%0"
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:
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: "r" (index), "rm" (ulong_val)
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: "cc");
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}
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static inline void
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asm_vmwrite64(ulong index, u64 val)
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{
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#ifdef __x86_64__
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asm volatile ("vmwrite %1,%0"
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:
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: "r" (index), "rm" (val)
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: "cc");
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#else
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ulong low, high;
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low = val;
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high = val >> 32;
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asm_vmwrite(index, low);
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asm_vmwrite(index + 1, high);
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#endif
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}
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/* 0f 01 c2 vmlaunch */
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static inline int
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asm_vmlaunch_regs (struct vt_vmentry_regs *p)
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{
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#ifdef __x86_64__
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return asm_vmlaunch_regs_64 (p);
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#else
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return asm_vmlaunch_regs_32 (p);
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#endif
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}
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/* 0f 01 c3 vmresume */
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static inline int
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asm_vmresume_regs (struct vt_vmentry_regs *p)
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{
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#ifdef __x86_64__
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return asm_vmresume_regs_64 (p);
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#else
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return asm_vmresume_regs_32 (p);
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#endif
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}
|
| 342 |
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/* 0f 78 c2 vmread %eax,%edx */
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static inline void
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asm_vmread (ulong index, ulong *val)
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{
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| 347 |
asm volatile ("vmread %1,%0"
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| 348 |
: "=rm" (*val)
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: "r" (index)
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: "cc");
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}
|
| 352 |
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| 353 |
static inline void
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asm_vmread32(ulong index, u32 *val)
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{
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ulong ulong_val;
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asm volatile ("vmread %1,%0"
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: "=rm" (ulong_val)
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: "r" (index)
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: "cc");
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| 361 |
*val = ulong_val;
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| 362 |
}
|
| 363 |
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static inline void
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| 365 |
asm_vmread64(ulong index, u64 *val)
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{
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| 367 |
#ifdef __x86_64__
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| 368 |
asm volatile ("vmread %1,%0"
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: "=rm" (*val)
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| 370 |
: "r" (index)
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| 371 |
: "cc");
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| 372 |
#else
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| 373 |
ulong low, high;
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| 374 |
asm_vmread(index, &low);
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| 375 |
asm_vmread(index + 1, &high);
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| 376 |
*val = low | (high << 32);
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| 377 |
#endif
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| 378 |
}
|
| 379 |
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| 380 |
static inline void
|
| 381 |
asm_invept(void *desc)
|
| 382 |
{
|
| 383 |
#ifdef __x86_64__
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| 384 |
asm volatile ("invept (%0), %%rax"
|
| 385 |
:
|
| 386 |
: "r" (desc),
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| 387 |
"a" (1)
|
| 388 |
: "cc");
|
| 389 |
#else
|
| 390 |
asm volatile ("invept (%0), %%eax"
|
| 391 |
:
|
| 392 |
: "r" (desc),
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| 393 |
"a" (1)
|
| 394 |
: "cc");
|
| 395 |
#endif
|
| 396 |
}
|
| 397 |
|
| 398 |
static inline void
|
| 399 |
asm_rdes (u16 *es)
|
| 400 |
{
|
| 401 |
asm volatile ("mov %%es,%0"
|
| 402 |
: "=rm" (*es));
|
| 403 |
}
|
| 404 |
|
| 405 |
static inline void
|
| 406 |
asm_rdcs (u16 *cs)
|
| 407 |
{
|
| 408 |
asm volatile ("mov %%cs,%0"
|
| 409 |
: "=rm" (*cs));
|
| 410 |
}
|
| 411 |
|
| 412 |
static inline void
|
| 413 |
asm_rdss (u16 *ss)
|
| 414 |
{
|
| 415 |
asm volatile ("mov %%ss,%0"
|
| 416 |
: "=rm" (*ss));
|
| 417 |
}
|
| 418 |
|
| 419 |
static inline void
|
| 420 |
asm_rdds (u16 *ds)
|
| 421 |
{
|
| 422 |
asm volatile ("mov %%ds,%0"
|
| 423 |
: "=rm" (*ds));
|
| 424 |
}
|
| 425 |
|
| 426 |
static inline void
|
| 427 |
asm_rdfs (u16 *fs)
|
| 428 |
{
|
| 429 |
asm volatile ("mov %%fs,%0"
|
| 430 |
: "=rm" (*fs));
|
| 431 |
}
|
| 432 |
|
| 433 |
static inline void
|
| 434 |
asm_rdgs (u16 *gs)
|
| 435 |
{
|
| 436 |
asm volatile ("mov %%gs,%0"
|
| 437 |
: "=rm" (*gs));
|
| 438 |
}
|
| 439 |
|
| 440 |
static inline void
|
| 441 |
asm_wres (u16 es)
|
| 442 |
{
|
| 443 |
asm volatile ("mov %0, %%es"
|
| 444 |
:
|
| 445 |
: "rm" ((ulong)es));
|
| 446 |
}
|
| 447 |
|
| 448 |
static inline void
|
| 449 |
asm_wrcs (u16 cs)
|
| 450 |
{
|
| 451 |
#ifdef __x86_64__
|
| 452 |
asm volatile ("pushq %0; push $1f; lretq; 1:"
|
| 453 |
:
|
| 454 |
: "g" ((ulong)cs));
|
| 455 |
#else
|
| 456 |
asm volatile ("pushl %0; push $1f; lret; 1:"
|
| 457 |
:
|
| 458 |
: "g" ((ulong)cs));
|
| 459 |
#endif
|
| 460 |
}
|
| 461 |
|
| 462 |
static inline void
|
| 463 |
asm_wrss (u16 ss)
|
| 464 |
{
|
| 465 |
asm volatile ("mov %0, %%ss"
|
| 466 |
:
|
| 467 |
: "rm" ((ulong)ss));
|
| 468 |
}
|
| 469 |
|
| 470 |
static inline void
|
| 471 |
asm_wrds (u16 ds)
|
| 472 |
{
|
| 473 |
asm volatile ("mov %0, %%ds"
|
| 474 |
:
|
| 475 |
: "rm" ((ulong)ds));
|
| 476 |
}
|
| 477 |
|
| 478 |
static inline void
|
| 479 |
asm_wrfs (u16 fs)
|
| 480 |
{
|
| 481 |
asm volatile ("mov %0, %%fs"
|
| 482 |
:
|
| 483 |
: "rm" ((ulong)fs));
|
| 484 |
}
|
| 485 |
|
| 486 |
static inline void
|
| 487 |
asm_wrgs (u16 gs)
|
| 488 |
{
|
| 489 |
asm volatile ("mov %0, %%gs"
|
| 490 |
:
|
| 491 |
: "rm" ((ulong)gs));
|
| 492 |
}
|
| 493 |
|
| 494 |
static inline void
|
| 495 |
asm_rdldtr (u16 *ldtr)
|
| 496 |
{
|
| 497 |
asm volatile ("sldt %0"
|
| 498 |
: "=rm" (*ldtr));
|
| 499 |
}
|
| 500 |
|
| 501 |
static inline void
|
| 502 |
asm_wrldtr (u16 ldtr)
|
| 503 |
{
|
| 504 |
asm volatile ("lldt %0"
|
| 505 |
:
|
| 506 |
: "rm" (ldtr));
|
| 507 |
}
|
| 508 |
|
| 509 |
static inline void
|
| 510 |
asm_rdtr (u16 *tr)
|
| 511 |
{
|
| 512 |
asm volatile ("str %0"
|
| 513 |
: "=rm" (*tr));
|
| 514 |
}
|
| 515 |
|
| 516 |
static inline void
|
| 517 |
asm_wrtr (u16 tr)
|
| 518 |
{
|
| 519 |
asm volatile ("ltr %0"
|
| 520 |
:
|
| 521 |
: "rm" (tr));
|
| 522 |
}
|
| 523 |
|
| 524 |
static inline void
|
| 525 |
asm_lsl (u32 sel, ulong *limit)
|
| 526 |
{
|
| 527 |
asm volatile ("lsl %1,%0"
|
| 528 |
: "=r" (*limit)
|
| 529 |
: "rm" ((ulong)sel)); /* avoid assembler bug */
|
| 530 |
}
|
| 531 |
|
| 532 |
static inline void
|
| 533 |
asm_lar (u32 sel, ulong *ar)
|
| 534 |
{
|
| 535 |
asm volatile ("lar %1,%0"
|
| 536 |
: "=r" (*ar)
|
| 537 |
: "rm" ((ulong)sel)); /* avoid assembler bug */
|
| 538 |
}
|
| 539 |
|
| 540 |
static inline void
|
| 541 |
asm_rdgdtr (ulong *gdtbase, ulong *gdtlimit)
|
| 542 |
{
|
| 543 |
struct descreg gdtr;
|
| 544 |
|
| 545 |
asm volatile ("sgdt %0"
|
| 546 |
: "=m" (gdtr));
|
| 547 |
*gdtbase = gdtr.base;
|
| 548 |
*gdtlimit = gdtr.limit;
|
| 549 |
}
|
| 550 |
|
| 551 |
static inline void
|
| 552 |
asm_rdidtr (ulong *idtbase, ulong *idtlimit)
|
| 553 |
{
|
| 554 |
struct descreg idtr;
|
| 555 |
|
| 556 |
asm volatile ("sidt %0"
|
| 557 |
: "=m" (idtr));
|
| 558 |
*idtbase = idtr.base;
|
| 559 |
*idtlimit = idtr.limit;
|
| 560 |
}
|
| 561 |
|
| 562 |
static inline void
|
| 563 |
asm_wrgdtr (ulong gdtbase, ulong gdtlimit)
|
| 564 |
{
|
| 565 |
struct descreg gdtr;
|
| 566 |
|
| 567 |
gdtr.base = gdtbase;
|
| 568 |
gdtr.limit = gdtlimit;
|
| 569 |
asm volatile ("lgdt %0"
|
| 570 |
:
|
| 571 |
: "m" (gdtr));
|
| 572 |
}
|
| 573 |
|
| 574 |
static inline void
|
| 575 |
asm_wridtr (ulong idtbase, ulong idtlimit)
|
| 576 |
{
|
| 577 |
struct descreg idtr;
|
| 578 |
|
| 579 |
idtr.base = idtbase;
|
| 580 |
idtr.limit = idtlimit;
|
| 581 |
asm volatile ("lidt %0"
|
| 582 |
:
|
| 583 |
: "m" (idtr));
|
| 584 |
}
|
| 585 |
|
| 586 |
static inline void
|
| 587 |
asm_rddr7 (ulong *dr7)
|
| 588 |
{
|
| 589 |
asm volatile ("mov %%dr7,%0"
|
| 590 |
: "=r" (*dr7));
|
| 591 |
}
|
| 592 |
|
| 593 |
static inline void
|
| 594 |
asm_rdrflags (ulong *rflags)
|
| 595 |
{
|
| 596 |
asm volatile (
|
| 597 |
#ifdef __x86_64__
|
| 598 |
"pushfq ; popq %0"
|
| 599 |
#else
|
| 600 |
"pushfl ; popl %0"
|
| 601 |
#endif
|
| 602 |
: "=rm" (*rflags));
|
| 603 |
}
|
| 604 |
|
| 605 |
static inline void
|
| 606 |
asm_inb (ioport_t port, u8 *data)
|
| 607 |
{
|
| 608 |
asm volatile ("inb %%dx,%%al"
|
| 609 |
: "=a" (*data)
|
| 610 |
: "d" (port));
|
| 611 |
}
|
| 612 |
|
| 613 |
static inline void
|
| 614 |
asm_inw (ioport_t port, u16 *data)
|
| 615 |
{
|
| 616 |
asm volatile ("inw %%dx,%%ax"
|
| 617 |
: "=a" (*data)
|
| 618 |
: "d" (port));
|
| 619 |
}
|
| 620 |
|
| 621 |
static inline void
|
| 622 |
asm_inl (ioport_t port, u32 *data)
|
| 623 |
{
|
| 624 |
asm volatile ("inl %%dx,%%eax"
|
| 625 |
: "=a" (*data)
|
| 626 |
: "d" (port));
|
| 627 |
}
|
| 628 |
|
| 629 |
static inline void
|
| 630 |
asm_outb (ioport_t port, u8 data)
|
| 631 |
{
|
| 632 |
asm volatile ("outb %%al,%%dx"
|
| 633 |
:
|
| 634 |
: "a" (data)
|
| 635 |
, "d" (port));
|
| 636 |
}
|
| 637 |
|
| 638 |
static inline void
|
| 639 |
asm_outw (ioport_t port, u16 data)
|
| 640 |
{
|
| 641 |
asm volatile ("outw %%ax,%%dx"
|
| 642 |
:
|
| 643 |
: "a" (data)
|
| 644 |
, "d" (port));
|
| 645 |
}
|
| 646 |
|
| 647 |
static inline void
|
| 648 |
asm_outl (ioport_t port, u32 data)
|
| 649 |
{
|
| 650 |
asm volatile ("outl %%eax,%%dx"
|
| 651 |
:
|
| 652 |
: "a" (data)
|
| 653 |
, "d" (port));
|
| 654 |
}
|
| 655 |
|
| 656 |
static inline void
|
| 657 |
asm_cli (void)
|
| 658 |
{
|
| 659 |
asm volatile ("cli");
|
| 660 |
}
|
| 661 |
|
| 662 |
static inline void
|
| 663 |
asm_sti (void)
|
| 664 |
{
|
| 665 |
asm volatile ("sti");
|
| 666 |
}
|
| 667 |
|
| 668 |
static inline void
|
| 669 |
asm_wrrsp_and_jmp (ulong rsp, void *jmpto)
|
| 670 |
{
|
| 671 |
asm volatile (
|
| 672 |
#ifdef __x86_64__
|
| 673 |
"mov %0,%%rsp;"
|
| 674 |
"xor %%rbp,%%rbp;"
|
| 675 |
"push %%rbp;"
|
| 676 |
"jmp *%1"
|
| 677 |
#else
|
| 678 |
"mov %0,%%esp;"
|
| 679 |
"xor %%ebp,%%ebp;"
|
| 680 |
"push %%ebp;"
|
| 681 |
"jmp *%1"
|
| 682 |
#endif
|
| 683 |
:
|
| 684 |
: "g" (rsp)
|
| 685 |
, "r" (jmpto));
|
| 686 |
}
|
| 687 |
|
| 688 |
static inline void
|
| 689 |
asm_wrrsp_and_ret (ulong rsp, ulong rax)
|
| 690 |
{
|
| 691 |
asm volatile (
|
| 692 |
#ifdef __x86_64__
|
| 693 |
"mov %0,%%rsp; ret"
|
| 694 |
#else
|
| 695 |
"mov %0,%%esp; ret"
|
| 696 |
#endif
|
| 697 |
:
|
| 698 |
: "g" (rsp)
|
| 699 |
, "a" (rax));
|
| 700 |
}
|
| 701 |
|
| 702 |
static inline void
|
| 703 |
asm_wbinvd (void)
|
| 704 |
{
|
| 705 |
asm volatile ("wbinvd");
|
| 706 |
}
|
| 707 |
|
| 708 |
static inline void
|
| 709 |
asm_invlpg (void *p)
|
| 710 |
{
|
| 711 |
asm volatile ("invlpg %0"
|
| 712 |
:
|
| 713 |
: "m" (*(u8 *)p));
|
| 714 |
}
|
| 715 |
|
| 716 |
static inline void
|
| 717 |
asm_cli_and_hlt (void)
|
| 718 |
{
|
| 719 |
asm volatile ("cli; hlt");
|
| 720 |
}
|
| 721 |
|
| 722 |
static inline void
|
| 723 |
asm_pause (void)
|
| 724 |
{
|
| 725 |
asm volatile ("pause");
|
| 726 |
}
|
| 727 |
|
| 728 |
static inline void
|
| 729 |
asm_rdrsp (ulong *rsp)
|
| 730 |
{
|
| 731 |
#ifdef __x86_64__
|
| 732 |
asm volatile ("mov %%rsp,%0" : "=rm" (*rsp));
|
| 733 |
#else
|
| 734 |
asm volatile ("mov %%esp,%0" : "=rm" (*rsp));
|
| 735 |
#endif
|
| 736 |
}
|
| 737 |
|
| 738 |
static inline void
|
| 739 |
asm_rdtsc (u32 *a, u32 *d)
|
| 740 |
{
|
| 741 |
asm volatile ("rdtsc" : "=a" (*a), "=d" (*d));
|
| 742 |
}
|
| 743 |
|
| 744 |
static inline void
|
| 745 |
asm_mul_and_div (u32 mul1, u32 mul2, u32 div1, u32 *quotient, u32 *remainder)
|
| 746 |
{
|
| 747 |
asm volatile ("mull %4 ; divl %5"
|
| 748 |
: "=&a" (*quotient)
|
| 749 |
, "=&d" (*remainder)
|
| 750 |
: "0" (mul1)
|
| 751 |
, "1" (0)
|
| 752 |
, "rm" (mul2)
|
| 753 |
, "rm" (div1)
|
| 754 |
: "cc");
|
| 755 |
}
|
| 756 |
|
| 757 |
static inline void
|
| 758 |
asm_lock_incl (u32 *d)
|
| 759 |
{
|
| 760 |
asm volatile ("lock incl %0" : "=m" (*d));
|
| 761 |
}
|
| 762 |
|
| 763 |
/*
|
| 764 |
if (*dest == *cmp) {
|
| 765 |
*dest = eq;
|
| 766 |
return false;
|
| 767 |
} else {
|
| 768 |
*cmp = *dest;
|
| 769 |
return true;
|
| 770 |
}
|
| 771 |
*/
|
| 772 |
static inline bool
|
| 773 |
asm_lock_cmpxchgl (u32 *dest, u32 *cmp, u32 eq)
|
| 774 |
{
|
| 775 |
int tmp = 0;
|
| 776 |
|
| 777 |
asm volatile ("lock cmpxchgl %4,%1 ; je 1f ; inc %2 ; 1:"
|
| 778 |
: "=&a" (*cmp)
|
| 779 |
, "=m" (*dest)
|
| 780 |
, "=&r" (tmp)
|
| 781 |
: "0" (*cmp)
|
| 782 |
, "r" (eq)
|
| 783 |
, "2" (0)
|
| 784 |
: "memory", "cc");
|
| 785 |
return (bool)tmp;
|
| 786 |
}
|
| 787 |
|
| 788 |
static inline bool
|
| 789 |
asm_lock_cmpxchgq (u64 *dest, u64 *cmp, u64 eq)
|
| 790 |
{
|
| 791 |
int tmp;
|
| 792 |
|
| 793 |
#ifdef __x86_64__
|
| 794 |
asm volatile ("lock cmpxchgq %4,%1 ; je 1f ; inc %2 ; 1:"
|
| 795 |
: "=&a" (*cmp)
|
| 796 |
, "=m" (*dest)
|
| 797 |
, "=&r" (tmp)
|
| 798 |
: "0" (*cmp)
|
| 799 |
, "r" (eq)
|
| 800 |
, "2" (0)
|
| 801 |
: "memory", "cc");
|
| 802 |
#else
|
| 803 |
asm volatile ("lock cmpxchg8b %1 ; je 1f ; inc %2 ; 1:"
|
| 804 |
: "=&A" (*cmp)
|
| 805 |
, "=m" (*dest)
|
| 806 |
, "=&r" (tmp)
|
| 807 |
: "0" (*cmp)
|
| 808 |
, "b" ((u32)eq)
|
| 809 |
, "c" ((u32)(eq >> 32))
|
| 810 |
, "2" (0)
|
| 811 |
: "memory", "cc");
|
| 812 |
#endif
|
| 813 |
return (bool)tmp;
|
| 814 |
}
|
| 815 |
|
| 816 |
/* old = *mem; *mem = newval; return old; */
|
| 817 |
static inline ulong
|
| 818 |
asm_lock_swap_ulong (ulong *mem, ulong newval)
|
| 819 |
{
|
| 820 |
ulong oldval;
|
| 821 |
|
| 822 |
asm volatile ("xchg %0,%1"
|
| 823 |
: "=r" (oldval)
|
| 824 |
, "=m" (*mem)
|
| 825 |
: "0" (newval));
|
| 826 |
return oldval;
|
| 827 |
}
|
| 828 |
|
| 829 |
static inline ulong
|
| 830 |
asm_lock_test_ulong (ulong *mem, int bit)
|
| 831 |
{
|
| 832 |
ulong val;
|
| 833 |
asm volatile ("bt %2,%0\n"
|
| 834 |
"setc %%al"
|
| 835 |
: "=m" (*mem)
|
| 836 |
, "=r" (val)
|
| 837 |
: "r" (bit)
|
| 838 |
, "1" (0));
|
| 839 |
return val;
|
| 840 |
}
|
| 841 |
|
| 842 |
static inline ulong
|
| 843 |
asm_lock_test_and_set_ulong (ulong *mem, int bit)
|
| 844 |
{
|
| 845 |
ulong oldval;
|
| 846 |
asm volatile ("lock bts %2,%0\n"
|
| 847 |
"setc %%al"
|
| 848 |
: "=m" (*mem)
|
| 849 |
, "=a" (oldval)
|
| 850 |
: "r" (bit)
|
| 851 |
, "1" (0));
|
| 852 |
return oldval;
|
| 853 |
}
|
| 854 |
|
| 855 |
static inline ulong
|
| 856 |
asm_lock_test_and_clear_ulong (ulong *mem, int bit)
|
| 857 |
{
|
| 858 |
ulong oldval;
|
| 859 |
asm volatile ("lock btr %2,%0\n"
|
| 860 |
"setc %%al"
|
| 861 |
: "=m" (*mem)
|
| 862 |
, "=a" (oldval)
|
| 863 |
: "r" (bit)
|
| 864 |
, "1" (0));
|
| 865 |
return oldval;
|
| 866 |
}
|
| 867 |
|
| 868 |
/*
|
| 869 |
* Bit scan reverse.
|
| 870 |
* Find the most significant set bit.
|
| 871 |
*/
|
| 872 |
static inline long
|
| 873 |
asm_bsr_ulong (ulong *mem)
|
| 874 |
{
|
| 875 |
long bit;
|
| 876 |
if (*mem == 0) {
|
| 877 |
return -1;
|
| 878 |
}
|
| 879 |
asm volatile ("bsr %1,%0\n"
|
| 880 |
: "=r" (bit)
|
| 881 |
: "m" (*mem));
|
| 882 |
return bit;
|
| 883 |
}
|
| 884 |
|
| 885 |
/*
|
| 886 |
* BIT scan forward.
|
| 887 |
* Find the least significant set bit.
|
| 888 |
*/
|
| 889 |
static inline long
|
| 890 |
asm_bsf_ulong (ulong *mem)
|
| 891 |
{
|
| 892 |
long bit;
|
| 893 |
if (*mem == 0) {
|
| 894 |
return -1;
|
| 895 |
}
|
| 896 |
asm volatile ("bsf %1,%0\n"
|
| 897 |
: "=r" (bit)
|
| 898 |
: "m" (*mem));
|
| 899 |
return bit;
|
| 900 |
}
|
| 901 |
|
| 902 |
/* 0f 01 d8 vmrun */
|
| 903 |
static inline void
|
| 904 |
asm_vmrun_regs (struct svm_vmrun_regs *p, ulong vmcb_phys, ulong vmcbhost_phys)
|
| 905 |
{
|
| 906 |
#ifdef __x86_64__
|
| 907 |
asm_vmrun_regs_64 (p, vmcb_phys, vmcbhost_phys);
|
| 908 |
#else
|
| 909 |
asm_vmrun_regs_32 (p, vmcb_phys, vmcbhost_phys);
|
| 910 |
#endif
|
| 911 |
}
|
| 912 |
|
| 913 |
|
| 914 |
static inline void
|
| 915 |
asm_monitor (void *addr, u32 c, u32 d)
|
| 916 |
{
|
| 917 |
asm volatile ("monitor"
|
| 918 |
:: "a" (addr), "c" (c), "d" (d));
|
| 919 |
}
|
| 920 |
|
| 921 |
static inline void
|
| 922 |
asm_mwait (u32 a, u32 c)
|
| 923 |
{
|
| 924 |
asm volatile ("mwait"
|
| 925 |
::"a" (a), "c" (c));
|
| 926 |
}
|
| 927 |
|
| 928 |
#endif
|